1. Field of the Invention
The present invention relates in general to an arbitrary waveform generator (AWG) and in particular to an AWG having a programmably configurable architecture.
2. Description of Related Art
A typical programmable arbitrary waveform generator (AWG) employs a pattern generator (either a counter or an algorithmic pattern generator), an addressable random access memory (RAM) and a digital-to-analog converter (DAC). The RAM stores a sequence of data words representing the time varying magnitude of an analog waveform to be generated. When the pattern generator supplies an address sequence to the RAM the RAM reads out the stored waveform data sequence to the DAC. The DAC responds to each data word of the sequence by generating an analog output signal of magnitude proportional to the magnitude of the data word. The sequence of output levels produced by the DAC in response to the waveform data sequence is usually filtered to produce a smoothly varying analog waveform. When the waveform is periodic, the word sequence stored in the RAM need represent only one cycle of the waveform. The pattern generator can supply a periodic address sequence to the RAM causing the RAM to periodically read out the sequence to the DAC.
The width of the RAM and the resolution of the DAC limit the resolution with which an AWG can control its output analog signal levels. For example, an AWG capable of producing any of 28 different output signal levels requires an 8-bit wide RAM and a DAC having 8-bit resolution. To increase the output signal resolution to 16 bits, we must increase the width of the RAM to 16-bits and double the resolution of the DAC to 16-bits. However, although wide, fast RAMs are relatively inexpensive, fast, high-resolution DACs are relatively costly. As we increase the resolution of an AWG we also rapidly increase its cost, mainly due to the cost of the increased DAC resolution.
An AWG can produce an output waveform having high frequency components by reading the waveform data sequence out of the RAM and supplying it to the DAC at a high rate. However since a RAM takes a finite amount time to read out a valid data word, and since a DAC takes a finite amount of time to convert the data word to an analog voltage or current, the maximum frequency of an AWG is limited by the operating speed of its RAM and DAC. It would be beneficial to provide a AWG that could produce high frequency output waveform without having to employ a high speed DAC or RAM.
A complex, wide-bandwidth analog waveform can have both high and low frequency components. The highest frequency component determines the minimum rate at which the RAM must supply data words to the DAC and the highest and lowest output signal frequency components in combination determine the minimum depth (number of available address spaces) of the RAM. For example when the highest frequency component of an output signal is 10 MHz the RAM should supply data words to the DAC at twice the 10 MHz rate (20 MHz) in order to adequately characterize the 10 MHz signal component. If the lowest frequency component of the output waveform is 20 Hz, then the RAM should be able store a data sequence capable of representing one full cycle of the 20 Hz component which lasts 0.05 seconds. A data sequence read out at a 20 MHz rate for 0.05 seconds would be 1 million words long. Thus the RAM must be able to store 1 million words every 0.05 seconds.
Thus the word depth of the AWG""s RAM limits the lower end of its output signal bandwidth. When the lowest frequency component of an AWG output signal is higher than its lower limit, much of the RAM capacity is idle. For example if the DAC has a 1 megabyte RAM, we can use the AWG in an application where it must produce a signal having both 10 MHz and 20 Hz components by programming it to periodically read out its full 1 megabyte sequence to the DAC. However in an another application where the output signal component frequencies range only between 10 MHz and 200 Hz, the RAM need only store and periodically read out a 100 kilobyte sequence to the DAC; the other 900 kilobytes of memory storage is idle. It would therefore also be beneficial to provide a DAC and which could make efficient use of its RAM resources.
An arbitrary waveform generator (AWG) in accordance with the present invention produces a time varying analog output signal defined by input programming data. The AWG employs an addressable random access memory (RAM), a programmable logic device (PLD), a programmable pattern generator, several digital-to-analog converters (DACS) and a current multiplexer.
The RAM stores a sequence of data words representing the time varying current magnitude of an analog waveform to be generated. The pattern generator periodically addresses the RAM thereby causing the RAM to read out its stored waveform data sequence to the PLD. The PLD routes selected fields of each waveform data word from the memory to one or more of the DACs in response to timing signals provided by the pattern generator. Each DAC converts each of its input data fields into an output analog current signal of magnitude proportional to the magnitude of its input waveform data field in accordance with a constant of proportionality defined by range control data supplied to each DAC. The current multiplexer, under control of selection data generated by the pattern generator, sums the current signals produced by one or more selected DACs to produce the AWG output signal. That signal may be converted to a voltage and filtered in a conventional manner to produce a smoothly varying analog waveform.
The nature of the output waveform produced by the AWG depends not only on the frequency and nature of the waveform data read out of the RAM, but also on the manner in which the PLD is programmed to route that waveform data to the DACs in response to timing signal from the pattern generator, the value of the range data supplied to each DAC, and the manner in which pattern generator is programmed to provide timing to the PLD and selection signals to the current multiplexer.
The AWG architecture provides flexibility in the way RAM and DAC resources are employed allowing a user to optimize AWG configuration based on output waveform frequency and resolution requirements. For example to produce a high frequency output signal, the PLD may be programmed to route separate fields of each RAM output data word to each DAC, with the current multiplexer alternately selecting the output of each of the DACs in turn as the AWG output signal. This interleaving of DAC outputs provides a high frequency output waveform while allowing the RAM and each DAC to operate at a lower frequency.
To produce a high resolution output AWG signal, the PLD may be programmed to route separate fields of each RAM output data word to each of several DACs, with the current multiplexer summing the outputs of the DACs to produce the AWG output signal. With each DAC having a separate, appropriately adjusted operating range, the magnitude of the output signal can be controlled with a resolution that is much higher than the resolution of any one DAC.
To provide an output waveform having a wide range of frequency components, the PLD may be programmed to successively route N separate fields of each data word read out of the RAM to the same DAC with the current multiplexer set to provide only that single DAC output as the AWG output. With the data sequence delivered to the DAC at its maximum operating frequency, the AWG can produce a waveform having a high frequency component limited only by the maximum operating frequency of the DAC. The output waveform can have a low frequency competent having a period that is the product of N, the word depth of the RAM and the period of the waveform""s highest frequency component. However the resolution of the waveform is limited to the resolution of the DAC.
It is accordingly an object of the invention to provide an AWG having an architecture that may be programmably configured to optimize a desired combination of output signal frequency and resolution.
The concluding portion of this specification particularly points out and distinctly claims the subject matter of the present invention. However those skilled in the art will best understand both the organization and method of operation of the invention, together with further advantages and objects thereof, by reading the remaining portions of the specification in view of the accompanying drawing(s) wherein like reference characters refer to like elements.